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{"id":7415807574176,"title":"AD9833 DDS Signal Generator Module 0 MHz to 12.5 MHz Square\/Triangle\/Sine Wave Power 2.3V to 5.5V","handle":"ad9833-dds-signal-generator-module-0-mhz-to-12-5-mhz-square-triangle-sine-wave-power-2-3v-to-5-5v","description":"\u003ch3\u003eAD9833 DDS Signal Generator Module 0 MHz to 12.5 MHz Square\/Triangle\/Sine Wave Power 2.3V to 5.5V\u003c\/h3\u003e\n\u003cp id=\"b\"\u003eLow Power 20 mW 2.3 V to 5.5 V Programmable Waveform\nGenerator GENERAL DESCRIPTION The AD9833 is a low power programmable waveform\ngenerator capable of producing sine, triangular, and square wave\noutputs.Waveform generation is required in various types of sensing,\nactuation, and time domain reflectometry applications. The output frequency\nand phase are software programmable, allowing easy tuning. No external\ncomponents are needed. The frequency regis ters are 28 bits; with a 25 MHz\nclock rate, resolution of 0.1 Hz can be achieved. Similarly, with a 1 MHz\nclock rate, the AD9833 can be tuned to 0.004 Hz resolution.The AD9833 is\nwritten to via a 3-wire serial interface. This serial interface operates at\nclock rates up to 40 MHz and is compatible with DSP and microcontroller\nstandards. The device operates with a power supply from 2.3 V to 5.5 V.The\nAD9833 has a power-down function (SLEEP). This allows sections of the device\nthat are not being used to be powered down, thus minimizing the current\nconsumption of the part, e.g., the DAC can be powered down when a clock output\nis being generated. The AD9833 is available in a 10-lead MSOP packag. Control\nRegister The AD9833 contains a 16-bit control register that sets up the AD9833\nas the user wants to operate it. All control bits, except MODE, are sampled on\nthe internal negative edge of MCLK.Table II describes the individual bits of\nthe control register. The different functions and the various output options\nfrom the AD9833 are described in more detail in the section following Table\nII.To inform the AD9833 that the contents of the control register will be\naltered, D15 and D14 must be set to 0 as shown below. INTERFACING TO\nMICROPROCESSORS The AD9833 has a standard serial interface that allows the\npart to interface directly with several microprocessors. The device uses an\nexternal serial clock to write the data\/control information into the device.\nThe serial clock can have a frequency of 40 MHz maximum. The serial clock can\nbe continuous, or it can idle high or low between write operations. When\ndata\/control information is being written to the AD9833, FSYNC is taken low\nand is held low while the 16 bits of data are being written into the AD9833.\nThe FSYNC signal frames the 16 bits of information being loaded into the\nAD9833. AD9833 to ADSP-21xx Interface Figure 10 shows the serial interface\nbetween the AD9833 and the ADSP-21xx. The ADSP-21xx should be set up to\noperate in the SPORT transmit alternate framing mode (TFSW = 1). The ADSP-21xx\nis programmed through the SPORT control register and should be configured as\nfollows: Internal clock operation (ISCLK = 1)Active low framing (INVTFS =\n1)16-bit word length (SLEN = 15)Internal frame sync signal (ITFS = 1)Generate\na frame sync for each write (TFSR = 1) Transmission is initiated by writing a\nword to the Tx register after the SPORT has been enabled. The data is clocked\nout on each rising edge of the serial clock and clocked into the AD9833 on the\nSCLK falling edge. Integrated Circuits U1 AD9833BRUU2 74HCT244U3 OSC XTAL 25\nMHz Capacitors C1, C2 100 nF Ceramic Capacitor 0805C3 10 nF Ceramic\nCapacitorC4 Option for Extra Decoupling CapacitC5, C6, C7, C9 100 nF Ceramic\nCapacitorC8, C10, C11 10 mF Tantalum Capacitor Resistor: R1 50 W Resistor\nLinks: LK1, LK2 2-Pin Sil Header Sockets: MCLK VOUT Subminiature BNC Connector\nOUTLINE DIMENSIONS\u003c\/p\u003e \n\n\u003ch3\u003eProduct Features\u003c\/h3\u003e\n \u003cul class=\"a\"\u003e\n \u003cli\u003epower down function The AD9833 has a power-down function (SLEEP). This allows sections of the device that are not being used to be powered down, thus minimizing the current consumption of the part, e.g., the DAC can be powered down when a clock output is being generated.\u003c\/li\u003e\n \u003cli\u003eoutput frequency and phase are software programmableThe output frequency and phase are software programmable, allowing easy tuning. No external components are needed.\u003c\/li\u003e\n \u003cli\u003epowerThe device operates with a power from 2.3 V to 5.5 V.\u003c\/li\u003e\n \u003cli\u003e0.1 Hz The frequency registers are 28 bits; with a 25 MHz clock rate, resolution of 0.1 Hz can be achieved. Similarly, with a 1 MHz clock rate, the AD9833 can be tuned to 0.004 Hz resolution.\u003c\/li\u003e\n \u003cli\u003ecompatible with microcontroller standardsThe AD9833 is written to via a 3-wire serial interface. This serial interface operates at clock rates up to 40 MHz and is compatible with microcontroller standards.\u003c\/li\u003e\n \u003c\/ul\u003e\n\n","published_at":"2022-06-15T19:03:51+10:00","created_at":"2022-06-15T19:04:00+10:00","vendor":"Hilitand","type":"Function Generators","tags":["dingo"],"price":11800,"price_min":11800,"price_max":11800,"available":true,"price_varies":false,"compare_at_price":null,"compare_at_price_min":0,"compare_at_price_max":0,"compare_at_price_varies":false,"variants":[{"id":42204729868448,"title":"Default Title","option1":"Default Title","option2":null,"option3":null,"sku":"B07H524W7J","requires_shipping":true,"taxable":true,"featured_image":null,"available":true,"name":"AD9833 DDS Signal Generator Module 0 MHz to 12.5 MHz Square\/Triangle\/Sine Wave Power 2.3V to 5.5V","public_title":null,"options":["Default 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DDS Signal Generator Module 0 MHz to 12.5 MHz Square\/Triangle\/Sine Wave Power 2.3V to 5.5V\u003c\/h3\u003e\n\u003cp id=\"b\"\u003eLow Power 20 mW 2.3 V to 5.5 V Programmable Waveform\nGenerator GENERAL DESCRIPTION The AD9833 is a low power programmable waveform\ngenerator capable of producing sine, triangular, and square wave\noutputs.Waveform generation is required in various types of sensing,\nactuation, and time domain reflectometry applications. The output frequency\nand phase are software programmable, allowing easy tuning. No external\ncomponents are needed. The frequency regis ters are 28 bits; with a 25 MHz\nclock rate, resolution of 0.1 Hz can be achieved. Similarly, with a 1 MHz\nclock rate, the AD9833 can be tuned to 0.004 Hz resolution.The AD9833 is\nwritten to via a 3-wire serial interface. This serial interface operates at\nclock rates up to 40 MHz and is compatible with DSP and microcontroller\nstandards. The device operates with a power supply from 2.3 V to 5.5 V.The\nAD9833 has a power-down function (SLEEP). This allows sections of the device\nthat are not being used to be powered down, thus minimizing the current\nconsumption of the part, e.g., the DAC can be powered down when a clock output\nis being generated. The AD9833 is available in a 10-lead MSOP packag. Control\nRegister The AD9833 contains a 16-bit control register that sets up the AD9833\nas the user wants to operate it. All control bits, except MODE, are sampled on\nthe internal negative edge of MCLK.Table II describes the individual bits of\nthe control register. The different functions and the various output options\nfrom the AD9833 are described in more detail in the section following Table\nII.To inform the AD9833 that the contents of the control register will be\naltered, D15 and D14 must be set to 0 as shown below. INTERFACING TO\nMICROPROCESSORS The AD9833 has a standard serial interface that allows the\npart to interface directly with several microprocessors. The device uses an\nexternal serial clock to write the data\/control information into the device.\nThe serial clock can have a frequency of 40 MHz maximum. The serial clock can\nbe continuous, or it can idle high or low between write operations. When\ndata\/control information is being written to the AD9833, FSYNC is taken low\nand is held low while the 16 bits of data are being written into the AD9833.\nThe FSYNC signal frames the 16 bits of information being loaded into the\nAD9833. AD9833 to ADSP-21xx Interface Figure 10 shows the serial interface\nbetween the AD9833 and the ADSP-21xx. The ADSP-21xx should be set up to\noperate in the SPORT transmit alternate framing mode (TFSW = 1). The ADSP-21xx\nis programmed through the SPORT control register and should be configured as\nfollows: Internal clock operation (ISCLK = 1)Active low framing (INVTFS =\n1)16-bit word length (SLEN = 15)Internal frame sync signal (ITFS = 1)Generate\na frame sync for each write (TFSR = 1) Transmission is initiated by writing a\nword to the Tx register after the SPORT has been enabled. The data is clocked\nout on each rising edge of the serial clock and clocked into the AD9833 on the\nSCLK falling edge. Integrated Circuits U1 AD9833BRUU2 74HCT244U3 OSC XTAL 25\nMHz Capacitors C1, C2 100 nF Ceramic Capacitor 0805C3 10 nF Ceramic\nCapacitorC4 Option for Extra Decoupling CapacitC5, C6, C7, C9 100 nF Ceramic\nCapacitorC8, C10, C11 10 mF Tantalum Capacitor Resistor: R1 50 W Resistor\nLinks: LK1, LK2 2-Pin Sil Header Sockets: MCLK VOUT Subminiature BNC Connector\nOUTLINE DIMENSIONS\u003c\/p\u003e \n\n\u003ch3\u003eProduct Features\u003c\/h3\u003e\n \u003cul class=\"a\"\u003e\n \u003cli\u003epower down function The AD9833 has a power-down function (SLEEP). This allows sections of the device that are not being used to be powered down, thus minimizing the current consumption of the part, e.g., the DAC can be powered down when a clock output is being generated.\u003c\/li\u003e\n \u003cli\u003eoutput frequency and phase are software programmableThe output frequency and phase are software programmable, allowing easy tuning. No external components are needed.\u003c\/li\u003e\n \u003cli\u003epowerThe device operates with a power from 2.3 V to 5.5 V.\u003c\/li\u003e\n \u003cli\u003e0.1 Hz The frequency registers are 28 bits; with a 25 MHz clock rate, resolution of 0.1 Hz can be achieved. Similarly, with a 1 MHz clock rate, the AD9833 can be tuned to 0.004 Hz resolution.\u003c\/li\u003e\n \u003cli\u003ecompatible with microcontroller standardsThe AD9833 is written to via a 3-wire serial interface. This serial interface operates at clock rates up to 40 MHz and is compatible with microcontroller standards.\u003c\/li\u003e\n \u003c\/ul\u003e\n\n"}

AD9833 DDS Signal Generator Module 0 MHz to 12.5 MHz Square/Triangle/Sine Wave Power 2.3V to 5.5V

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AD9833 DDS Signal Generator Module 0 MHz to 12.5 MHz Square/Triangle/Sine Wave Power 2.3V to 5.5V

Low Power 20 mW 2.3 V to 5.5 V Programmable Waveform Generator GENERAL DESCRIPTION The AD9833 is a low power programmable waveform generator capable of producing sine, triangular, and square wave outputs.Waveform generation is required in various types of sensing, actuation, and time domain reflectometry applications. The output frequency and phase are software programmable, allowing easy tuning. No external components are needed. The frequency regis ters are 28 bits; with a 25 MHz clock rate, resolution of 0.1 Hz can be achieved. Similarly, with a 1 MHz clock rate, the AD9833 can be tuned to 0.004 Hz resolution.The AD9833 is written to via a 3-wire serial interface. This serial interface operates at clock rates up to 40 MHz and is compatible with DSP and microcontroller standards. The device operates with a power supply from 2.3 V to 5.5 V.The AD9833 has a power-down function (SLEEP). This allows sections of the device that are not being used to be powered down, thus minimizing the current consumption of the part, e.g., the DAC can be powered down when a clock output is being generated. The AD9833 is available in a 10-lead MSOP packag. Control Register The AD9833 contains a 16-bit control register that sets up the AD9833 as the user wants to operate it. All control bits, except MODE, are sampled on the internal negative edge of MCLK.Table II describes the individual bits of the control register. The different functions and the various output options from the AD9833 are described in more detail in the section following Table II.To inform the AD9833 that the contents of the control register will be altered, D15 and D14 must be set to 0 as shown below. INTERFACING TO MICROPROCESSORS The AD9833 has a standard serial interface that allows the part to interface directly with several microprocessors. The device uses an external serial clock to write the data/control information into the device. The serial clock can have a frequency of 40 MHz maximum. The serial clock can be continuous, or it can idle high or low between write operations. When data/control information is being written to the AD9833, FSYNC is taken low and is held low while the 16 bits of data are being written into the AD9833. The FSYNC signal frames the 16 bits of information being loaded into the AD9833. AD9833 to ADSP-21xx Interface Figure 10 shows the serial interface between the AD9833 and the ADSP-21xx. The ADSP-21xx should be set up to operate in the SPORT transmit alternate framing mode (TFSW = 1). The ADSP-21xx is programmed through the SPORT control register and should be configured as follows: Internal clock operation (ISCLK = 1)Active low framing (INVTFS = 1)16-bit word length (SLEN = 15)Internal frame sync signal (ITFS = 1)Generate a frame sync for each write (TFSR = 1) Transmission is initiated by writing a word to the Tx register after the SPORT has been enabled. The data is clocked out on each rising edge of the serial clock and clocked into the AD9833 on the SCLK falling edge. Integrated Circuits U1 AD9833BRUU2 74HCT244U3 OSC XTAL 25 MHz Capacitors C1, C2 100 nF Ceramic Capacitor 0805C3 10 nF Ceramic CapacitorC4 Option for Extra Decoupling CapacitC5, C6, C7, C9 100 nF Ceramic CapacitorC8, C10, C11 10 mF Tantalum Capacitor Resistor: R1 50 W Resistor Links: LK1, LK2 2-Pin Sil Header Sockets: MCLK VOUT Subminiature BNC Connector OUTLINE DIMENSIONS

Product Features

  • power down function The AD9833 has a power-down function (SLEEP). This allows sections of the device that are not being used to be powered down, thus minimizing the current consumption of the part, e.g., the DAC can be powered down when a clock output is being generated.
  • output frequency and phase are software programmableThe output frequency and phase are software programmable, allowing easy tuning. No external components are needed.
  • powerThe device operates with a power from 2.3 V to 5.5 V.
  • 0.1 Hz The frequency registers are 28 bits; with a 25 MHz clock rate, resolution of 0.1 Hz can be achieved. Similarly, with a 1 MHz clock rate, the AD9833 can be tuned to 0.004 Hz resolution.
  • compatible with microcontroller standardsThe AD9833 is written to via a 3-wire serial interface. This serial interface operates at clock rates up to 40 MHz and is compatible with microcontroller standards.